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This commit: - Instantiates HPO HDMI encoders - Restores HPO HDMI registers to the register list - Implements set_hdmistreamclk Signed-off-by: Michał Kopeć <michal@nozomi.space>
…_hdmistreamclk Signed-off-by: Michał Kopeć <michal@nozomi.space>
…r.h: drop unused registers These don't exist on earlier DCN. Drop to make the encoder compatible with all DCN gens. Signed-off-by: Michał Kopeć <michal@nozomi.space>
…ntiate HPO HDMI Signed-off-by: Michał Kopeć <michal@nozomi.space>
…DMI stream enc register Rename HDMI_STREAM_ENC_CLOCK_RAMP_ADJUSTER_FIFO_STATUS_CONTROL0__FIFO_PIXEL_ENCODING to HDMI_STREAM_ENC_CLOCK_RAMP_ADJUSTER_FIFO_STATUS_CONTROL0__FIFO_PIXEL_ENCODING_TYPE This makes the register name the same as on DCN401, ensuring we can use a common HPO HDMI encoder implementation on all gens. Signed-off-by: Michał Kopeć <michal@nozomi.space>
…tantiate HPO HDMI Encoders Signed-off-by: Michał Kopeć <michal@nozomi.space>
…ntiate HPO HDMI Encoders Signed-off-by: Michał Kopeć <michal@nozomi.space>
Signed-off-by: Michał Kopeć <michal@nozomi.space>
Signed-off-by: Michał Kopeć <michal@nozomi.space>
Signed-off-by: Michał Kopeć <michal@nozomi.space>
Signed-off-by: Michał Kopeć <michal@nozomi.space>
Signed-off-by: Michał Kopeć <michal@nozomi.space>
…_hdmistreamclk Signed-off-by: Michał Kopeć <michal@nozomi.space>
… HDMISTREAMCLK define Signed-off-by: Michał Kopeć <michal@nozomi.space>
…ntiate HPO HDMI encoders Signed-off-by: Michał Kopeć <michal@nozomi.space>
…tantiate HPO HDMI encoders Signed-off-by: Michał Kopeć <michal@nozomi.space>
[Why] With a real client for these caps, there was a need to slightly modify how they are saved and what info they contain. [How] Save FRL info in renamed parsing function + save raw max_rate value. Eject FRL data into separate struct, reused in dsc_caps. Signed-off-by: Tomasz Pakuła <tomasz.pakula.oficjalny@gmail.com>
[Why] Incoming HDMI FRL training will need this info to properly decide on link training settings. [How] Add HDMI FRL data to dc_edid_caps as a separate struct. Copy HDMI FRL caps to amdgpu's own edid_caps. Signed-off-by: Tomasz Pakuła <tomasz.pakula.oficjalny@gmail.com>
[Why] Incoming HDMI DSC over FRL support will need this info to properly decide on link training settings and further link/compression settings. Info about DSC support will also be needed to decide which modes can be supported by DSC. [How] Add HDMI DSC data to dc_edid_caps as a separate struct. Use FRL struct inside not to duplicate efforts. Copy HDMI DSC caps to amdgpu's own edid_caps. Signed-off-by: Tomasz Pakuła <tomasz.pakula.oficjalny@gmail.com>
[Why] Enable FRL training that's based on dat areceived from sink in it's edid. [How] Pass the data from local_sink's edid_caps to dc_link current config and use it, to perform FRL training. Signed-off-by: Tomasz Pakuła <tomasz.pakula.oficjalny@gmail.com>
…c: fix FRL lane count
Many TVs and other HDMI sinks suffer from blanking and possibly other glitches when VRR is toggled. With VRR present on such sinks and vrr_on_desktop enabled, they behave like the signal is always variable, even in fixed refresh rate situations. DisplayPort and eDP enforce seamless VRR transitions but HDMI unfortunately doesn't. Keep VRR toggled if it's supported and not explicitly disabled. It can be used for any VRR sinks, but this is mainly targeted for HDMI. Functionally, for an end user, this is the same as normal, fixed refresh rate mode. The only difference is that sink is kept in VRR state which enables seamless transitions into/out of variable refresh rate. Basically, the driver shouldn't change it's behavior around VRR_ENABLED set to false, jut keep sending info packets/frames with VRR/FreeSync/ G-Sync/HDMI VRR active. Enabled by default for sinks that claim it's support Signed-off-by: Tomasz Pakuła <tomasz.pakula.oficjalny@gmail.com>
Supplement to the passive_vrr_disabled crtc property Drivers can add the property to a connector with drm_connector_attach_passive_vrr_capable_property(). The value should be updated based on driver and hardware capability by using drm_connector_set_passive_vrr_capable_property(). Signed-off-by: Tomasz Pakuła <tomasz.pakula.oficjalny@gmail.com>
Adds HDMI Auto Low Latency Mode optional connector properties allm_mode and allm_mode_capable. ALLM automatically puts TVs into low latency modes (gaming modes) and it's part of the HDMI Gaming Features introduced in HDMI 2.1. allm_mode_capable indicates whether connector (sink) supports ALLM allm_mode tells the driver which triggering mode to use. Off, dynamic and always on. Dynamic mode should consider the content type and the state of the crtc to discern whether ALLM should be activated. Recommendation is Content Type Hint == Game || VRR_ENABLED based on testing behaviors on other operating systems and multiple GPU vendors + how TVs behave. Signed-off-by: Tomasz Pakuła <tomasz.pakula.oficjalny@gmail.com>
[How] Attach and use this properties for HDMI sinks which are troublesome with their VRR state transitions. Hook into already-established freesync_on_desktop logic. Signed-off-by: Tomasz Pakuła <tomasz.pakula.oficjalny@gmail.com>
[Why] To enable ALLM when asked for by compositor [How] Attach properties to HDMI sinks, detect support and set allm_capable property, set allm_capable property for amdgpu_dm_connector Signed-off-by: Tomasz Pakuła <tomasz.pakula.oficjalny@gmail.com>
…BCLK in HDMI FRL case
…set_hdmistreamclk for dccg35
… validation already done in dc_resource.c
…it and clear final status update
…r.c: fix pixel encoding
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