Fixes for ifx

[billsacks]

Description of changes

(1) ifx apparently doesn't do short-circuit evaluation, so SMS_D_Ld1.ne30pg3_t232.I1850Clm50BgcSpinup.derecho_intel.clm-cplhist was crashing with floating invalid when using the ifx compiler (via ccs_config_cesm1.0.75).

(2) Some input files need NaNs converted to non-NaN fill values

Specific notes

Contributors other than yourself, if any: @jedwards4b

CTSM Issues Fixed (include github issue #):

• Resolves Fix issues uncovered with ifx compiler #3762
• Resolves Floating invalid with ifx compiler in UrbanTimeVarType.F90 #3763
• Resolves NaN values in some input files cause problems with ifx compiler #3764

Are answers expected to change (and if so in what way)? No

Any User Interface Changes (namelist or namelist defaults changes)?

Does this create a need to change or add documentation? Did you do so?

Testing performed, if any:
(List what testing you did to show your changes worked as expected)
(This can be manual testing or running of the different test suites)
(Documentation on system testing is here: https://github.com/ESCOMP/ctsm/wiki/System-Testing-Guide)
(aux_clm on derecho for intel/gnu and izumi for intel/gnu/nag/nvhpc is the standard for tags on master)

NOTE: Be sure to check your coding style against the standard
(https://github.com/ESCOMP/ctsm/wiki/CTSM-coding-guidelines) and review
the list of common problems to watch out for
(https://github.com/ESCOMP/CTSM/wiki/List-of-common-problems).

[billsacks]

With the changes here together with the change in ESCOMP/MOSART#126, the failing derecho-intel I compset tests are now passing with the recent ccs_config update:

DAE_C2_D_Lh12.f10_f10_mg37.I2000Clm50BgcCrop.derecho_intel.clm-DA_multidrv
ERP_D_Ld3_PS.f09_g17.I2000Clm50Sp.derecho_intel.clm-prescribed
ERP_P256x2_D_Ld5.f19_g17_gris4.I1850Clm50BgcCropG.derecho_intel.clm-glcMEC_increase
ERP_P64x2_D.f10_f10_mg37.I2000Clm50SpRtmFl.derecho_intel.clm-default--clm-nofireemis
SMS_D_Ld1_Mmpi-serial.ne3_ne3_mg37.I2000Clm50SpRs.derecho_intel.clm-ptsRLA
SMS_D_Ld1.ne30pg3_t232.I1850Clm50BgcSpinup.derecho_intel.clm-cplhist--clm-matrixcnOn
SMS_D_Ld1.ne30pg3_t232.I1850Clm50BgcSpinup.derecho_intel.clm-cplhist
SMS_D_Ld3.f10_f10_mg37.I1850Clm50BgcCrop.derecho_intel.clm-default--clm-matrixcnOn
SMS_D_Ld3.f10_f10_mg37.I1850Clm50BgcCrop.derecho_intel.clm-default

My next steps:

• Move the new Prigent file into inputdata (needs fixed directory permissions - currently I tested by temporarily pointing to a file in my scratch space)
• Rebase this onto the bit-for-bit branch
• Run aux_clm derecho-intel tests

I'll mark this as ready for review once these things are done.