[FIRRTL][SV] Inliner inlines an instance with an inner ref captured by sv.verbatim

[uenoku]

module {
  firrtl.circuit "Foo" {
    sv.verbatim "{{0}}" {symbols = [#hw.innerNameRef<@Foo::@sym>] }
    firrtl.module private @Baz() attributes {annotations = [{class = "firrtl.passes.InlineAnnotation"}]} {
      %a = firrtl.wire interesting_name : !firrtl.uint<1>
      %invalid_ui1 = firrtl.invalidvalue : !firrtl.uint<1>
      firrtl.matchingconnect %a, %invalid_ui1 : !firrtl.uint<1>
    }
    firrtl.module @Foo() {
      firrtl.instance baz sym @sym interesting_name @Baz()
    }
  }
}

$ circt-opt --firrtl-inliner
module {
  firrtl.circuit "Foo" {
    sv.verbatim "{{0}}" {symbols = [#hw.innerNameRef<@Foo::@sym>]}
    firrtl.module @Foo() {
      %baz_a = firrtl.wire interesting_name : !firrtl.uint<1>
      %invalid_ui1 = firrtl.invalidvalue : !firrtl.uint<1>
      firrtl.matchingconnect %baz_a, %invalid_ui1 : !firrtl.uint<1>
    }
  }
}

@sym doesn't exist anymore and raises an error in ExportVerilog.
It also passes a verifier because sv.verbatim doesn't implement InnerRefUserOpInterface